
2026-01-26 13:48:27
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Shanghai, China, January 19, 2026 — Cadence recently introduced the industry’s first high-reliability LPDDR5X 9600Mbps memory IP system solution designed for enterprise and data center applications. This solution integrates Cadence’s production-proven LPDDR5X IP with Microsoft’s next-generation RAIDDR ECC error-correction coding technology, delivering enterprise-grade reliability and stability while maintaining high performance and low power consumption. Microsoft has become the first customer to adopt this solution.
With the rapid development of AI infrastructure, LPDDR5X is increasingly favored by data centers due to its advantages in energy efficiency and performance. However, balancing power, performance, area (PPA) with memory reliability, availability, and serviceability (RAS) has remained a challenge for hyperscale data center operators.
The newly launched solution is based on LPDDR5X DRAM technology, supports data transfer rates of up to 9600Mbps, and achieves sideband ECC performance comparable to traditional DDR5 ECC within a compact package, significantly enhancing system reliability. The core innovation lies in the integration of Microsoft’s RAIDDR ECC encoding scheme, which offers near-single-device data correction (SDCC) capabilities with low logic overhead, providing protection equivalent to symbol-level ECC in DDR5 RDIMMs.
Boyd Phelps, Senior Vice President and General Manager of the Silicon Solutions Group at Cadence, stated, “We have combined the high-speed, low-power advantages of LPDDR5X with the reliability of Microsoft’s RAIDDR ECC to set a new benchmark for high-performance memory systems.” Saurabh Dighe, Corporate Vice President of System Planning and Architecture at Microsoft, also noted that this collaboration will drive broader industry adoption of high-performance, low-power data center solutions.
The memory IP solution is offered as a complete subsystem, suitable for high-performance applications such as AI training and inference. Cadence continues to expand its memory interface IP portfolio, covering mainstream standards such as LPDDR, DDR5, PCIe, and UCIe, supporting the development of next-generation computing and communication systems.
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